2015 Cornell IAP Cloud Workshop - Agenda, Abstracts, and Speaker Bios

Platinum Sponsors of the Cornell Cloud Workshop

Duffield Hall Atrium
Friday October 2, 2015

8:00-8:30AM Badge Pick-up – Coffee/Tea and Breakfast Food/Snacks
8:30-8:50AM Prof. José Martínez  – Cornell – "Scalable Dynamic Multi-Resource Allocation in Multicore Architectures: A Market Approach”
8:50-9:10AM Craig McLuckie – Google  – “Google Infrastructure Goes Open Source: Container-Oriented Cloud Computing via Kubernetes and OpenStack"
9:10-9:30AM

Tong Li – IBM – “OpenStack Kiloeyes – A New Cloud Monitoring System”

9:30-9:50AM Robert Broberg – Cisco –  “Trustable Systems and Cisco's Advanced Security Research Initiative”
9:50-10:10AM Kevin Widmer – SK Hynix – “DRAM, Flash and Future Memory in Heterogeneous Tiered Memory Subsystems"
10:10-10:30AM

Prof. Ken Birman – Cornell – “Cloud Hosted Computing for Demanding Real-time Applications”

10:30-11:00AM Lightning Round of Student Posters
11:00-1:00PM Lunch, Cloud Poster Viewing, and Career Fair in Duffield Atrium
1:00-1:20PM

Prof. Emin Gün Sirer – Cornell – “Everything You've Been Told About Data Stores Is Wrong"

1:20-1:40PM

Dr. Siamack Haghighi  – Samsung –  “Advancing from Server to Rack and Data Center as a Computer”

1:40-2:00PM Prof. Robbert van Renesse  – Cornell – “Transformations: Software-Defined Distributed Systems”
2:00-2:20PM

Nick Finamore – Altera – “Accelerating Cloud Computing Algorithms with FPGAs using a Standard Software Programming Environment”

2:20-2:40PM Dr. Pankaj Mehra – SanDisk  – “Memory Technologies for an Increasingly Mobile, Social, and Instrumented User Base”
2:40-3:00PM Break  - Refreshments
3:00-3:20PM Prof. Nate Foster – Cornell – “Network Programming with Frenetic”
3:20-3:40PM Gary Xia – Huawei – “OpenStack Virtual Desktop Infrastructure“
3:40-4:00PM Dr. Erich Haratsch – Seagate – "Controller concepts for 1y/z nm and 3D NAND flash" 
4:00-4:20PM Prof. Chris Batten – Cornell – “Asymmetry-Aware Work-Stealing Runtimes”
4:20-4:40PM Ed McLellan – Cavium –  “Shared Cache Allocation on a 48-core ARMv8 SoC”
4:40-5:30PM Reception – Refreshments and Poster Awards in Duffield Atrium
   

Presentation Abstracts and Bios

Prof. Ken Birman Cornell “Cloud hosted computing for demanding real-time applications”
Abstract: My group is working with a consortium of bulk electric power transmission operators for the Northeastern US on a cloud-based “smart grid” infrastructure.  Although the real need is to use the cloud to host machine-learning and optimization technologies, the nature of the problem forces us to think hard about how one can build a cloud-scale solution that is also secure enough to support a nationally critical resource, strongly consistent, and seamlessly recoverable after disruption.  Today we have a platform running: we call it GridCloud, and have just completed a DOE-funded effort to show that it could monitor the national bulk power grid.  One follow-on project will seek to transition the technology to ISO NE, NYPA and NY ISO.    A follow-on proposal would deploy GridCloud in a smart power distribution system with substantial microgeneration (rooftop solar) and schedulable loads (a/c, baseboard electric heaters, hot water heaters) and explore distributed supply/demand control with much larger numbers of sensor endpoints and fairly tight real-time control-loop objectives.   The GridCloud system could be useful in other real-time settings too.  For example, self-driving cars might require cloud-hosted situation awareness tools, automated health-care solutions could easily have the mix of security and reliability issues on which we focus, and similar comments can be made about smart homes and office complexes, banking, and other demanding use cases.  In fact, we like to think of the system as a kind of operating system for the mission-critical cloud, hosted inside systems like Amazon AWS or AWS government, and augmenting the standard cloud frameworks with extra features aimed at improving consistency, fault-tolerance and supporting realtime responses within time bounds that could be as small as 100ms.

Bio: Ken Birman is the N. Rama Rao Professor of Computer Science at Cornell.  An ACM Fellow and the winner of the IEEE Tsutomu Kanai award, Ken has written 3 textbooks and published more than 150 papers in prestigious journals and conferences.  Software he developed operated the New York Stock Exchange for more than a decade without trading disruptions, and played central roles in the French Air Traffic Control System (now expanding into much of Europe) and the US Navy AEGIS warship. Other technologies from his group found their way into IBM’s Websphere product, Amazon’s EC2 and S3 systems, Microsoft’s cluster management solutions.   His Isis2 system (isis2.codeplex.com) helps developers create secure, strongly consistent and scalable cloud computing solutions.  Starting in 2010, Birman’s focus has shifted to the smart power grid; he works both at the scale of the bulk power transmission network (as part of a consortium led by ISO New England and that includes NYPA and ISO New York) as well as at the scale of smaller distribution networks where the focus is on privacy-preservation for algorithms that employ smart meters in the home.

Prof. Chris Batten Cornell “Asymmetry-Aware Work-Stealing Runtimes”
Abstract: Amdahl's Law provides architects a compelling reason to introduce system asymmetry to optimize for both serial and parallel regions of execution. Asymmetry in a multicore processor can arise statically (e.g., from core microarchitecture) or dynamically (e.g., applying dynamic voltage/frequency scaling). Work-stealing is an increasingly popular approach to task distribution that elegantly balances task-based parallelism across multiple worker threads. In this talk, I will discuss our recent work on asymmetry-aware work-stealing (AAWS) runtimes which are carefully designed to exploit both the static and dynamic asymmetry in modern systems. AAWS runtimes use two key hardware/software techniques: work-sprinting and work-mugging. Work-sprinting combines a marginal-utility-based approach with integrated voltage regulators to improve the performance and energy efficiency in both high- and low-parallel regions. Work-mugging enables a waiting big core to preemptively migrate work from an active little core. We are using a vertically integrated research methodology spanning VLSI, architecture, and software to make the case that holistically combining static asymmetry, dynamic asymmetry, and work-stealing runtimes can improve both performance and energy efficiency in future multicore systems.

Bio: Christopher Batten is an Assistant Professor in the School of Electrical and Computer Engineering at Cornell University, where he leads a research group focusing on energy-efficient parallel computer architecture for both high-performance and embedded applications. His work has been recognized with several awards including an AFOSR Young Investigator Award (2015), Intel Early Career Faculty Honor Program award (2013), an NSF CAREER award (2012), a DARPA Young Faculty Award (2012), and an IEEE Micro Top Picks selection (2004). His teaching has been recognized with a Michael Tien '72 Excellence in Teaching Award (2013) and a James M. and Marsha D. McCormick Award for Outstanding Advising of First-Year Engineering Students (2013). Prior to his appointment at Cornell, Batten received his Ph.D. in electrical engineering and computer science from the Massachusetts Institute of Technology in 2010. He received an M.Phil. in engineering as a Churchill Scholar at the University of Cambridge in 2000, and received a B.S. in electrical engineering as a Jefferson Scholar at the University of Virginia in 1999.

Prof. Nate Foster Cornell “Network Programming with Frenetic”
Abstract:  Recent years have seen growing interest in high-level frameworks for programming software-defined networks. In this talk, I will discuss the motivations behind the shift toward more programmable networks and highlight some of the challenges that arise when implementing rich functionality using current platforms. I will then present a framework for specifying and verifying network behavior using a high-level programming language and discuss how to compile programs in these languages into efficient low-level code for network devices.


Bio:
Nate Foster is an Assistant Professor of Computer Science at Cornell University. His research focuses on developing language abstractions and tools for building reliable systems. He received a PhD in Computer and Information Science from the University of Pennsylvania in 2009, an MPhil in History and Philosophy of Science and Medicine from Cambridge University in 2008, and a BA in Computer Science from Williams College in 2001. His awards include a Sloan Research Fellowship, an NSF CAREER Award, a Most Influential POPL Paper Award, a Tien '72 Teaching Award, an NSDI '13 Community Award, a Google Research Award, a Yahoo! Academic Career Enhancement Award, and the Penn CIS Morris and Dorothy Rubinoff Award.

Prof. José Martínez Cornell “Scalable Dynamic Multi-Resource Allocation in Multicore Architectures: A Market Approach”
Abstract: Efficiently allocating shared on-chip resources across apps is critical to optimize execution in modern multicore/SoC processors. Existing techniques often rely on global, centralized mechanisms that seek to maximize system throughput. This presents two potentially important limitations: First, global optimization may hurt fairness–by unfairly neglecting the resource needs of any one application. Second, global optimization may hurt scalability–as more cores are integrated on a die, the search space grows exponentially, making it harder to achieve optimal or even acceptable operating points at run-time without incurring significant overheads.

We propose XChange, a novel CMP resource allocation mechanism that delivers scalable high throughput and fairness. Through XChange, the CMP functions as a market, where each shared resource is assigned a price which changes over time, and each core seeks to maximize its own utility, by bidding for these shared resources. By distributing the resources proportionally to the bids, the system avoids unfairness, treating each core in an unbiased manner. In addition, because each core works largely independently, the resource allocation becomes a scalable, mostly distributed decision-making process.

Our evaluation shows that in a 64-core CMP system, XChange improves system throughput (weighted speedup) by 22%, and fairness (harmonic speedup) by 24%, compared with equal-share resource distribution. On both metrics, that is about twice as much improvement over equal-share as a state-of-the-art centralized allocation scheme. Furthermore, our results show that XChange is significantly more scalable than the state-of-the-art centralized allocation scheme we compare against.


Bio:
José Martínez is associate professor of electrical and computer engineering and graduate field member of computer science at Cornell. His research work has earned several awards; among them: two IEEE Micro Top Picks papers; a HPCA Best Paper Award; a NSF CAREER Award; two IBM Faculty Awards; and the inaugural Computer Science Distinguished Educator Alumnus Award by the University of Illinois. On the teaching side, he has been recognized with two College of Engineering Kenneth A. Goldman '71 Excellence in Teaching awards (2005 and 2014), as a Merrill Presidential Teacher (2007), and as the 2011 Tau Beta Pi Professor of the Year in the College of Engineering.

Prof. Martínez is a member of the Computer Systems Laboratory and the Intelligent Information Systems Institute at Cornell. He is the Editor in Chief of IEEE Computer Architecture Letters, Associate Editor of ACM Trans. on Computer Architecture and Code Optimization, and senior member of the ACM and the IEEE. He also serves on the Advisory Board of the Industry-Academia Partnership for architecture, networking, and storage needs of future data centers and cloud computing.

Prof. Emin Gün Sirer Cornell – “Everything You've Been Told About Data Stores Is Wrong"
Abstract: The CAP Theorem dictates that when it comes to data stores: "Consistency, Availability and Partition-Tolerance: pick at most two." This catchy refrain has been adopted by countless engineers, often to justify the deployment of inconsistent data stores. In this talk, I describe why the so-called theorem is flawed, and what that portends for next generation data stores.

Bio:  My research spans operating systems, networking and distributed systems. My current projects involve a novel secure operating system and system infrastructure for high-performance cloud computing applications. I like building things, especially systems that have some principled reason for why they should work. Ph.D. & M.S., University of Washington; B.S.E., Princeton University.

Prof. Robbert van Renesse Cornell “Transformations: Software-Defined Distributed Systems”
Abstract: Building large distributed systems that meet both functional and performance expectations while being efficient and able to mask failures is difficult, and approaches for techniques such as replication and sharding do not compose in a straightforward manner.  We are developing an architecture based on ideas borrowed from Software Defined Networking to make it easier to build, deploy, and manage large distributed systems, as well as new techniques for composing replicated and sharded services.


Bio:
Robbert van Renesse is a Research Professor in the Department of Computer Science at Cornell University, interested in the theory and practice of fault tolerant, secure, and scalable distributed systems.  He has developed widely used distributed algorithms such as Chain Replication and Scuttlebutt (State Reconciliation for Gossip Protocols).  He is a Fellow of the ACM, and currently serves as Chair of the ACM Special Interest Group on Operating Systems (SIGOPS).

Dr. Pankaj Mehra Sandisk “Memory Technologies for an Increasingly Mobile, Social, and Instrumented User Base”
Abstract: A fierce battle is raging amongst the technology giants to capture the "large context" of billions of technology-addicted users and to bring it to bear in moments of truth, situationally. Pankaj will present a quantitative view of how much context data exists about users and "things." Large SLA gaps exist between how fast it can be processed today versus how fast it needs to be processed. This has implications on the architecture of cloud, mobile and systems in general, and indirectly on the evolution of the memory hierarchy, in particular. Pankaj will share his own experiences building commercial-grade platforms and technologies in persistent memory area, and share his view of where the latest industry developments are pointing. The talk concludes with Pankaj's view of the 10 most interesting thesis topics in systems and software.


Bio:
Pankaj Mehra, a Top 50 CTO (ExecRank'14 #39) at Fusion-IO, now VP and Senior Fellow in CTO Office and SanDisk Technology Council chair. Founder (Whodini, IntelliFabric). HP Distinguished Technologist and founding Chief Scientist HP Labs Russia ('04-'10). 10+ years creating Persistent Memory first ('02-'06) at the confluence of InfiniBand (1.0 co-author) and NonStop Advanced Architecture (co-inventor), and again ('12-'15). Built Context Engines ('08-'13). 3 books + 48 papers (many on Machine Learning since '89); 25+ patent filings, including Virtual Switch, Persistent Memory, and Compression Enhancing Routing Algorithms. Ph.D. Illinois-CS, B.Tech. IITD-CS.

Dr. Siamack Haghighi – Samsung – “Advancements in the architecture of server to data center computing”
Abstract: This talk is an overview of the general data center, server and subsystem architectures.  The goal is optimal scalable computing architectures for servers, racks of servers, and data centers operating as unified computers.  Special focus is on memory and storage for efficient big-data parallel-processing applications and state of the art system-on-chip (SoC) solid-state controller architectures. The talk finishes by highlighting potential areas of further fruitful research and collaboration.


Bio:
Siamack Haghighi is a principal system-on-chip and system architect in Samsung Semiconductor's Memory Solutions Lab in San Jose, CA. He received his Ph.D. from Arizona State University in 1990, with M.S. and B.S. in electrical and computer engineering from Iowa State University. He is a senior member of IEEE and has numerous issued and pending patents and refereed technical publications and book chapters. Dr. Haghighi's current work is research of advanced chip and system architectures for high performance, scalable, interactive cloud and big data computing. His past work spans CPU, desktop, mobile, smart phone, tablet, and embedded computer architectures and design at Samsung, Amazon, Mediatek, Qualcomm, and Intel.

Craig McLuckie – Google  – “Google Infrastructure Goes Open Source: Container-Oriented Cloud Computing via Kubernetes and OpenStack"
Abstract: Today we stand at the intersection of three quite disruptive technology trends.  The first is the emergence of hybrid cloud as a standard business requirement for many businesses.  The second is the move from virtualized infrastructure to virtualized operating system with Linux application containers.  The final is the dawning awareness of 'cloud native' computing patterns -- building systems using the same patterns and practices inspired by internet companies like Google, Facebook and Twitter.  During this session we will explore the overall implication of these three changes from Google's perspective, and in particular focus on Google's work in the Open Source community to support the evolution of the technologies needed to support the transformation.  We will also look at the implications of building technology in the open and the role of the community in the product cycle.


Bio:
Craig McLuckie is a group product manager at Google. He launched Google Compute Engine, Google's VM product, then started working on bringing together the world of PaaS and IaaS, and was a founder of the Kubernetes project. He is also responsible for Google Container Engine, Google's hosted container offering and Deployment Manager that brings declarative resource management to the Google Cloud Platform. Prior to Google Craig worked at Microsoft on developer and enterprise software.

Nick Finamore – Altera – “Accelerating Cloud Computing Algorithms with FPGAs using a Standard Software Programming Environment”
Abstract:   Programmable logic has helped the promise of accelerating computing algorithms for really hard problems.  As density of logic has increased, the reality of accelerating computing with FPGAs has also increased.  However, the traditional programming environment for FPGAs is not practical for development of real solutions.   With the delivery of C level software compilers for FPGAs, acceleration solutions are now being implemented in many application areas including cloud computing.   This discussion will introduce SW programming using OpenCL and example applications for FPGA accelerators.


Bio:
Nick Finamore manages Altera's software development tools including the SDK for OpenCL.   Previously he held several senior management positions at early stage technology companies.    Nick also spent 18 years at Intel Corp and held several management positions including general manager of its network processor division.   Nick earn a BSEE degree at Cornell where he was inspired to pursue a career in microprocessor technology while developing a processor built on a "Vrana Box" in the lab for his EE475 course.

Dr. Erich Haratsch Seagate "Controller concepts for 1y/z nm and 3D NAND flash" 
Abstract: The capacity of NAND flash memories continues to increase: Planar NAND is scaling down to 1y nm and potentially even 1z nm geometries, while 3D NAND adds layers in the third dimension. Capacity is further increased by introducing triple-level cell (TLC) technology in order to store 3 bits per cell. This presentation will describe controller concepts for these new NAND flash memory generations, and it will explain how advanced error recovery, signal processing, and NAND management techniques improve the reliability and lifetime for these devices. 


Bio:
Dr. Erich F. Haratsch is Director of Engineering at Seagate Technology, where he leads the Firmware Architecture development of solid-state drive controllers. Prior to joining Seagate, Dr. Haratsch was Director of Engineering at LSI Corp., where he led the development of advanced signal processing, error correction coding and NAND management features for solid-state drive controllers. Earlier in his career, Dr. Haratsch developed signal processing and error correction technologies for multiple generations of HDD controllers at LSI and Agere Systems. At Bell Labs Research in Holmdel, N.J., he invented new equalizer and decoder architectures for Gigabit Ethernet over copper and optical communications. Dr. Haratsch regularly speaks at numerous industry events, is the author of more than 45 peer-reviewed journal and conference papers, and holds 92 U.S. patents.  He also is a Senior Member of IEEE, and earned his M.S. and Ph.D. degrees from the Technical University of Munich, Germany.

Tong Li – IBM – “OpenStack Kiloeyes – A New Cloud Monitoring System”
Abstract: As we enter the era of the software defined data center, cloud operators and users face the ongoing need for accurate control and monitoring of the system utilization and quality of service. OpenStack Kiloeyes is a cloud monitoring solution, similar in sprit to AWS Cloud Watch, which was motivated by scaling concerns with earlier open source monitoring solutions. In this talk we describe the Kiloeyes architecture, which relies upon other open source solutions such as Kafka and Elastic Search, and an array of micro-services including streaming threshold, alarm and anomaly prediction engines.  We also describe how Kiloeyes has application beyond traditional monitoring, e.g., can serve as a front end for Twitter Storm, Apache Spark and other systems to analyze high volume message traffic (>100,000 messages per sec) in real time for big data analytics.  Finally, we describe how students at Carnegie Mellon worked with us to contribute production code to Kiloeyes as a capstone project to satisfy their masters degrees.


Bio:
Tong Li is a Senior Software Engineer at IBM and currently an OpenStack Active Technical Contributor. Tong has made significant contributions to OpenStack projects such as Swift, Ceilometer, and is a core contributor to the Kiloeyes open source OpenStack monitoring service. Tong has led several OpenStack design summit sessions at OpenStack Summits on topics such as Cloud Storage, System Monitoring, cloud Performance improvement. He has an MS in Computer Science from the University of Alabama. Tong mentors university students on open source projects, and is a big fan of college football.

Kevin Widmer – SK Hynix – “DRAM, Flash and Future Memory in Heterogeneous Tiered Memory Subsystems"
Abstract: DRAM scaling challenges are driving changes in system memory hierarchy. Innovative DRAM solutions like HBM2 are moving closer to the CPU and Flash-based SSD’s are displacing hard disk drives in many applications. With DRAM and NAND cost and performance diverging, the discussion has shifted to which future memory technology will fill the gap. “DRAM, Flash and Future Memory in Heterogeneous Tiered Memory Subsystems" will discuss future memory options and industry mobilization required to make future memory a reality.


Bio:
Kevin Widmer is VP of Technical Marketing at SK hynix America Inc., a leading manufacturer of DRAM, NAND and SSD solutions. Prior to joining SK hynix in 2013, Mr. Widmer served in various product definition, product planning and strategic marketing roles at Micron Technology Inc. and Spansion Inc. Mr. Widmer holds BS Physics, BSEE, and MBA degrees from Florida Atlantic University and has been awarded 20 US patents related to semiconductor memory technology.

Gary Xia – Huawei – “OpenStack Virtual Desktop Infrastructure“
Abstract: We will describe a controller system for virtual desktop farms that can be deployed on an Openstack platform.  The system can be considered today as a third party application that runs on Openstack. In the future, it could be straightforwardly be configured as an integrated service that is included in a future Openstack release. The system conceptually contains two main parts, a VM provisioning service and a desktop broker.  


Bio:
Gary Xia is Principal Architect for the FusionAccess (VDI) product at Huawei, where he helps lead strategy and technical innovation for cloud systems. Gary is a pioneer of the Citrix adaptive display and HDX technologies, among the first solutions for a high-definition user experience on virtual desktops. He has over 20 years experience in networking, virtualization, and cloud technologies.  Gary has a MS in Computer Science from the University of Florida.

Ed McLellan – Cavium –  “Shared Cache Allocation on a 48-core ARMv8 SoC”
Abstract: We examine shared cache allocation on the Cavium ThunderX™ 64-bit ARMv8 Data Center & Cloud Processors. This product family is based on highly efficient full custom processor cores designed by Cavium in 28nm process technology under architectural license from ARM, fully compliant with ARMv8 architecture as well as ARM’s Server Base System Architecture (SBSA) standard.


Bio:
Ed McLellan is a Distinguished Engineer at Cavium working on a next generation core and SoC.  He received a BS in Computer & Systems Engineering from RPI and has worked previously at AMD, C-Port/Motorola and DEC on processors and systems including a PDP-11, multiple Alpha cores, network processor SoCs and power management.  He holds about 25 patents issued and pending.

Robert Broberg – Cisco  “Trustable Systems and Cisco's Advanced Security Research Initiative”
Abstract: A look at Trustable systems and Cisco's Advanced Security Research efforts to future proof the Internet against attacks.


Bio:
Robert Broberg is a Distinguished Engineer at Cisco Systems. Robert started his career in networking at Ungermann-Bass in 1984 and since then has been leading innovations in IP networking spanning everything from device drivers, applications to large system design. His career has spanned many roles. Some highlights include, 2 years in Tokyo leading network the industry transition from XNS to TCP, 3 years at Bell-Labs in Physical Systems research as IP transitioned from a TDM based phone client to owning Optical transport and 3 years at AYR netkworking, a startup using Linux as an OS for high performance ASIC assisted routers.

Robert is currently part of the newly formed Advanced Security Research Group at Cisco. This group has a vision to address security in the 5,10 to 15 year horizon by partnering worldwide with Academics, Industry consortiums and leading research institutions.